The inventors have observed that conventional etch methods utilized to form features in the fabrication of three dimensional devices (e.g., negated and or not-and (NAND) devices) typically display an undesirably low ratio of lateral etch to vertical etch (L/V ratio). Such low L/V ratios may result in undesirable process results during the fabrication of the device. For example, a low L/V ratio may cause a photoresist utilized to define the features to be prematurely consumed, thereby limiting a number and/or the dimensions of a feature that may be formed.
Thus, the inventors have provided improved methods for forming three dimensional NAND structures atop a substrate